1-bit ADC Receivers

Why Low-Resolution ADCs Now

In every previous chapter the analog-to-digital converter was invisible: we wrote y=Hx+w\mathbf{y} = \mathbf{H}\mathbf{x} + \mathbf{w} and used y\mathbf{y} as if it were a real-valued complex vector. That fiction is harmless at conventional array sizes, but it collapses in massive MIMO. The receiver needs one ADC pair per antenna element, and the power of a Walden-type flash/pipeline ADC scales as

PADC(b,fs)=c0 2b fs,P_{\text{ADC}}(b, f_s) = c_0\, 2^b\, f_s,

where bb is the effective resolution (bits) and fsf_s is the sampling rate. For b=12b = 12 bits at fs=1f_s = 1 GS/s, a single pair draws hundreds of milliwatts; multiply by Nr=256N_r = 256 antennas and two rails and the front-end alone exceeds the cell-power budget of a small base station before a single MAC operation has been computed. At mmWave the situation is worse: fsf_s scales with the larger bandwidth.

The obvious cure is to shrink bb. Each bit saved halves the ADC power. The extreme β€” b=1b = 1, i.e. a pair of comparators replacing the entire converter β€” is essentially free. The research question this chapter answers is: how much of the Shannon capacity do we lose if we replace the ADCs with sign detectors, and can we claw most of it back by smarter receiver design?

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Definition:

1-Bit (Sign) Quantizer

The per-antenna 1-bit quantizer is the memoryless map Q1:C→{±1±j}Q_1: \mathbb{C} \to \{\pm 1 \pm j\} defined by

Q1(y)=sign⁑(Re⁑(y))+j sign⁑(Im⁑(y)),Q_1(y) = \operatorname{sign}\bigl(\operatorname{Re}(y)\bigr) + j\,\operatorname{sign}\bigl(\operatorname{Im}(y)\bigr),

with sign⁑(0)β‰œ+1\operatorname{sign}(0) \triangleq +1 by convention. Applied elementwise to a receive vector y∈CNr\mathbf{y} \in \mathbb{C}^{N_r}, the resulting quantized observation is yq=Q1(y)∈{Β±1Β±j}Nr\mathbf{y}_q = Q_1(\mathbf{y}) \in \{\pm 1 \pm j\}^{N_r}. The corresponding real-valued map is a scalar binary hypothesis test: for each I/Q rail the receiver records only the sign.

In the general bb-bit case, QbQ_b is a uniform mid-rise quantizer with 2b2^b output levels per rail, designed so that the clipping and granularity noise are balanced. We write yq=Qb(y)\mathbf{y}_q = Q_b(\mathbf{y}) for the element-wise application.

The 1-bit receiver looks almost laughably crude β€” two comparators per antenna, no gain control needed β€” but the loss compared to the ideal channel is surprisingly mild in massive MIMO. Large array gain combined with favorable propagation means the receiver sees a high effective SNR even after sign quantization.

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⚠️Engineering Note

Walden Power Scaling and Why 1-Bit is Almost Free

Empirical fits to hundreds of commercial converters (Walden 1999, updated annually by Murmann) show the figure-of-merit FoM=P/(2b fs)β‰ˆ10\text{FoM} = P / (2^b\, f_s) \approx 10–10001000 fJ per conversion step. For a fixed FoM, doubling bb roughly doubles the ADC power; at b=12b = 12 an array of 256 elements at fs=1f_s = 1 GS/s dissipates on the order of 100100 W in just the converters, comparable to the entire RF chain of a small-cell base station. Dropping to b=1b = 1 drops that figure by a factor 212=40962^{12} = 4096. This is the energy argument that brought 1-bit and low-resolution massive MIMO from a theoretical curiosity to a deployable option.

Practical Constraints
  • β€’

    fs≳2Wf_s \gtrsim 2 W for Nyquist sampling (so large-bandwidth mmWave is worst affected)

  • β€’

    Dynamic range lost with small bb must be recovered by AGC or by the array gain itself

  • β€’

    1-bit converters eliminate the need for AGC and the sample-and-hold, saving additional area

πŸ“‹ Ref: Walden 1999 ADC Survey; Murmann ADC Survey 2015
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Theorem: Low-SNR Capacity Loss of the 1-Bit Receiver

Consider a single-input single-output real channel Y=SNR X+WY = \sqrt{\text{SNR}}\,X + W with W∼N(0,1)W \sim \mathcal{N}(0, 1) and a power-constrained input E[X2]≀1\mathbb{E}[X^2] \leq 1. Let C∞(SNR)=12log⁑2(1+SNR)C_\infty(\text{SNR}) = \tfrac{1}{2}\log_2(1 + \text{SNR}) be the ideal (infinite-precision) capacity, and let C1(SNR)C_1(\text{SNR}) be the capacity of the sign-quantized output Yq=sign⁑(Y)Y_q = \operatorname{sign}(Y). Then

lim⁑SNRβ†’0C1(SNR)C∞(SNR)=2Ο€,\lim_{\text{SNR} \to 0} \frac{C_1(\text{SNR})}{C_\infty(\text{SNR})} = \frac{2}{\pi},

so that 1-bit quantization incurs a 10log⁑10(Ο€/2)β‰ˆ1.9610 \log_{10}(\pi/2) \approx 1.96 dB low-SNR capacity loss, and no more.

At low SNR, the optimal input is antipodal on-off (or BPSK) β€” all the information is in the sign of YY, and the sign bit is exactly what the quantizer keeps. What is lost is a factor 2/Ο€β‰ˆ0.6372/\pi \approx 0.637 in mutual information, which equals the slope of the arcsine at the origin; geometrically it is the ratio between the area under the PDF on either side of zero and the full unit-area Gaussian integral used by the infinite-precision receiver.

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Arcsine Law for 1-Bit Correlation

Beyond the low-SNR regime, the analysis of 1-bit receivers rests on the classical arcsine law (Van Vleck and Middleton 1966): for two jointly Gaussian real variables (Y1,Y2)(Y_1, Y_2) with zero mean and correlation ρ\rho,

E[sign⁑(Y1)sign⁑(Y2)]=2Ο€arcsin⁑(ρ).\mathbb{E}\bigl[\operatorname{sign}(Y_1)\operatorname{sign}(Y_2)\bigr] = \tfrac{2}{\pi}\arcsin(\rho).

This identity is the engine that lets us compute Bussgang gains, quantized covariances, and channel-estimation MSE all in closed form. It will reappear throughout Section 19.2 as the backbone of the Bussgang decomposition.

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1-Bit Capacity Loss vs SNR

Compare the infinite-precision capacity C∞=log⁑2(1+SNR)C_\infty = \log_2(1 + \text{SNR}) with the SISO 1-bit real-channel capacity C1=1βˆ’H2(Q(SNR))C_1 = 1 - H_2(Q(\sqrt{\text{SNR}})). Observe the constant β‰ˆ1.96\approx 1.96 dB gap at low SNR, and the 1-bit-rate ceiling at 1 bit/channel use β€” the hard consequence of only having a single output bit.

Parameters
-15
20
120

Example: 1-Bit MRC with Large Array Gain

A single-user uplink has Nr=256N_r = 256 1-bit antennas and an i.i.d. Rayleigh channel H∼CN(0,I)\mathbf{H} \sim \mathcal{CN}(0, \mathbf{I}), so βˆ₯Hβˆ₯2β‰ˆNr\|\mathbf{H}\|^2 \approx N_r by channel hardening. The per-antenna SNR is SNR=βˆ’10\text{SNR} = -10 dB (=0.1=0.1). Compare the infinite-precision matched-filter rate log⁑2(1+Nr SNR)\log_2(1 + N_r\,\text{SNR}) with the 1-bit rate (using the Bussgang formula, no other users, no inter-antenna quantization correlation).

Constellation Design: PSK is King for 1-Bit

What constellation should the transmitter use if the receiver is going to throw away amplitude information? In a single-antenna 1-bit receiver the output lies in {Β±1Β±j}\{\pm 1 \pm j\}, a four-point constellation, so anything finer than QPSK cannot be resolved from a single observation. The natural match is therefore PSK: the signal lives on the unit circle so only the phase carries information, and massive arrays let us resolve fine phase steps through coherent combining even though each antenna is only a sign detector.

QAM is the wrong choice for 1-bit. High-order QAM uses amplitude levels that the sign quantizer cannot distinguish β€” two different 16-QAM inner points may produce identical sign patterns at a given antenna. Empirical studies (Mollen et al. 2017) show that 8-PSK and 16-PSK with 1-bit massive MIMO achieve rates that 16-QAM and 64-QAM cannot approach. Chapters 20 and 22 extend this analysis to hybrid-beamforming and 5G-NR constellations.

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Common Mistake: 1-Bit Does Not Mean Zero Calibration

Mistake:

One often hears that 1-bit receivers "need no AGC, no calibration, no bias control" β€” the comparator just measures the sign. The implication is that a 1-bit front-end is plug-and-play.

Correction:

The sign reference must be at the true zero of the received I/Q waveform. A slow DC offset of even a few millivolts in the analog chain shifts the decision threshold and flips an otherwise balanced decision; if the offset is larger than the signal amplitude, every sample is pinned to one level and all information is lost. Practical 1-bit receivers still need a DC-offset loop, temperature compensation, and LO-leakage calibration. What they do not need is a variable-gain amplifier, an nn-level quantizer, or a sample-and-hold β€” and those are the components that dominate Walden power. The energy savings are real but smaller than the 2b2^b argument suggests because the fixed DC-offset loop and the comparators themselves set a floor.

Historical Note: From Radar to Massive MIMO

1960s-2015

The study of sign-only receivers began with Van Vleck and Middleton's 1966 paper on polarity-coincidence correlation, written for radar systems where amplitude digitization was then impractical. Their arcsine law β€” E[sign⁑(Y1)sign⁑(Y2)]=(2/Ο€)arcsin⁑(ρ)\mathbb{E}[\operatorname{sign}(Y_1)\operatorname{sign}(Y_2)] = (2/\pi)\arcsin(\rho) β€” gave the first rigorous calculation of the information penalty. The communications community revived the topic briefly in the 1990s (Zhang 1994, Koch and Lapidoth 2009) and then decisively in 2009 with Singh, Mondal, Mehanna and Madhow's paper on capacity at low SNR with 1-bit ADCs, which proved the 2/Ο€2/\pi loss is exact. The massive-MIMO renaissance came in 2012 when Mezghani and Nossek showed that the Bussgang decomposition makes 1-bit receivers tractable in multi-user settings; Mo and Heath (2015) capped the theoretical picture with tight capacity bounds and an explicit characterization of the optimal input. Large-scale hardware demonstrations followed with Studer and Durisi's group at ETH and Cornell in 2017.

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ADC Resolutions in Massive MIMO: A Quick Comparison

Resolution bbRelative ADC powerSNR penalty (high-SNR floor)Typical use case
1 bit21=22^1 = 2 (reference)β‰ˆ1.96\approx 1.96 dB at low SNR, larger at high SNRLow-SNR mmWave uplink, energy-constrained sensors
2 bitsβ‰ˆ4Γ—\approx 4\timesβ‰ˆ0.8\approx 0.8 dB asymptoticallyCompromise for moderate SNR
4 bitsβ‰ˆ16Γ—\approx 16\timesβ‰ˆ0.1\approx 0.1 dBMid-range deployments, dominant in 2020s massive MIMO
8 bitsβ‰ˆ256Γ—\approx 256\timesnegligible (<0.01<0.01 dB)High-SNR, low-bandwidth, legacy sub-6 GHz
12 bitsβ‰ˆ4096Γ—\approx 4096\timesnoneConventional wideband RX, measurement equipment

Quick Check

At low SNR the capacity of a 1-bit real-channel receiver compared to the infinite-precision one is limited to what fraction of the ideal capacity, and what is the corresponding loss in decibels?

1/21/2 (3.01 dB)

2/Ο€2/\pi (β‰ˆ1.96\approx 1.96 dB)

Ο€/4\pi/4 (β‰ˆ1.05\approx 1.05 dB)

2/e2/e (β‰ˆ1.32\approx 1.32 dB)

1-bit ADC

Analog-to-digital converter with a single output bit per I/Q rail, i.e. a comparator against zero. In massive MIMO the 1-bit receiver dramatically reduces front-end power at the cost of a low-SNR capacity loss of 2/Ο€2/\pi (about 1.96 dB). See Definition D1-Bit (Sign) Quantizer.

Related: Bussgang Decomposition, Arcsine Law for 1-Bit Correlation, Mixed-ADC Massive MIMO Receiver

Arcsine law (Van Vleck)

For two jointly zero-mean Gaussian random variables with correlation ρ\rho, the expected product of their signs is (2/Ο€)arcsin⁑(ρ)(2/\pi)\arcsin(\rho). The backbone of Bussgang analysis for 1-bit receivers.

Related: Bussgang Decomposition, 1-bit ADC