Amplitude–Phase Coupling in Real Elements
The Unit-Modulus Fiction
The ideal model assumes for every element. In a real unit cell, the reflection amplitude varies with the phase setting. Near the LC resonance that gives the largest phase shift, the diode's small series resistance dissipates the most energy — and the amplitude dips. Far from resonance, the amplitude is near 1 but the phase range is narrow. This is the amplitude–phase coupling (APC) that every real unit cell exhibits.
Definition: Amplitude–Phase Coupling Model
Amplitude–Phase Coupling Model
Let denote the commanded phase and the resulting amplitude of the reflection coefficient. A practical phenomenological model is
where is the worst-case amplitude (at , the resonant phase), and controls the sharpness of the dip. Typical measured values: –, –.
The unit-modulus idealization corresponds to ; any represents a real hardware loss.
Crucially, is determined by the same variable () as the phase itself. Unlike conventional DAC quantization noise, APC is fully deterministic once the element's physical parameters are measured. It can be compensated — if you know your unit cell's curve. Most papers assume unit modulus; papers that don't are the ones that match measured beam patterns.
Amplitude–Phase Coupling of a Varactor Element
Theorem: SNR Loss from Amplitude–Phase Coupling
Under the amplitude–phase model of Definition 2.2, the coherent received amplitude sum under optimal phase alignment becomes
a weighted coherent sum. The effective power loss vs. the unit-modulus case is
In particular, if all are approximately equal, the loss is — a flat power penalty.
Some elements reflect less energy because their commanded phase lies near the amplitude dip. The coherent sum weights each contribution by its amplitude. Not all elements contribute equally; the ones with amplitude-dip phases contribute less.
Coherent sum with amplitude
The reflected field in the aligned regime is where is the aligned product .
Compare to ideal
For (ideal), . Ratio: . Under uniform : .
Example: Penalty of a Real Unit Cell
Suppose a unit cell has the APC profile and the optimal phases are uniformly distributed on . Compute the average APC penalty and compare with the unit-modulus ideal.
Numerical integration
The average (the profile spends time near both ends of the amplitude range).
APC penalty
, a power loss of .
Comparison
Adding this to the 3-bit quantization loss gives a total hardware loss of . This is the gap between "ideal textbook" and "actual measured" performance in first-generation RIS panels.
Compensation by Phase Re-optimization
APC is not the end of the story. If the controller knows the amplitude profile , it can re-optimize the phase shifts to account for the coupling — minimizing a weighted sum where high-amplitude phases contribute more. This restores some of the lost gain, at the cost of a more complex optimization problem. Abeywickrama et al. (2020) show that naive phase-only optimization (assuming ) is suboptimal by when ; coupling-aware optimization reduces this to . We will formulate the coupling-aware problem in Chapter 6.
Reflection Coefficient Locus in the Complex Plane
Explore the locus as the hardware parameters vary. When the locus approaches the unit circle (ideal); as decreases, the locus becomes a cardioid-like curve and the reachable reflection coefficients shrink.
Parameters
Common Mistake: Ignoring APC in Simulation
Mistake:
An algorithm paper assumes , derives a clean closed-form, and claims improvement over a baseline. A hardware lab builds the RIS and reports the baseline instead.
Correction:
Real hardware has somewhere. The clean closed-form is still a useful theoretical tool (it tells you what perfectly-phased hardware would achieve), but published claims of gain need to be compared against a baseline evaluated under the same hardware constraints. Always include the APC loss in the final comparison, or clearly flag that the numbers are for ideal hardware.
APC Calibration in the Field
Calibrating a deployed RIS panel for APC requires measuring the amplitude and phase response of each element across all bit states. For a -element, 3-bit panel, that is measurements. Factory calibration is standard; on-site calibration against a reference source (e.g., the BS itself sending known pilots) is sometimes used to compensate for temperature drift. The calibration data is stored in a lookup table and the controller applies per-element corrections when computing phase shifts.
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Temperature drift of reflection phase: per .
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Element-to-element variance from manufacturing: standard deviation.
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Typical calibration data size: bytes at 16-bit per element.