Exercises

$b = 1$: $\eta = \mathrm{sinc}^2(\pi/2) = (2/\pi)^2 \approx 0.405$ ($-3.92$ dB). $b = 2$: $\eta = \mathrm{sinc}^2(\pi/4) \approx 0.811$ ($-0.91$ dB). $b = 3$: $\eta = \mathrm{sinc}^2(\pi/8) \approx 0.950$ ($-0.22$ dB). $b = 4$: $\eta = \mathrm{sinc}^2(\pi/16) \approx 0.987$ ($-0.06$ dB).

The jump from 1-bit to 2-bit is $3$ dB. The jump from 2 to 3 is only $0.7$ dB. Diminishing returns beyond 2-bit explains the industry sweet spot.

$20° = 0.349$ rad, $\sigma_\phi^2 = 0.122$. $G = 512 + 512 \cdot 511 \cdot e^{-0.122} = 512 + 231650 \approx 232162$. Ratio to $N^2 = 262144$: $0.886$ ($-0.53$ dB).

$5° = 0.087$ rad, $\sigma_\phi^2 = 0.0076$. $G = 512 + 512 \cdot 511 \cdot e^{-0.0076} = 512 + 259636 \approx 260148$. Ratio: $0.992$ ($-0.03$ dB).

Tightening calibration gains $0.53 - 0.03 = 0.5$ dB — equivalent to adding $\sim 58$ more elements. Not huge, but free compared to adding hardware.

$T_1 = 4096 \cdot 0.1 = 410$ s $\approx 6.8$ min.

$T_{\text{total}} = 50 \cdot 410 = 20500$ s $\approx 5.7$ h. Still manageable in one day; prep automation (rotating stage) critical.

$\eta_{\text{ang}} = \cos(45°) \cos(60°) = 0.707 \cdot 0.5 = 0.354$. In dB: $10 \log_{10}(0.354) = -4.51$ dB.

Near-grazing geometries are expensive. Installation practice: minimize max incidence angle.

Field measures 10 dB less than chamber. This is the "chamber-to-field derating" and is typically attributed to: (i) multipath-generated reference signal ($\sim 3$-6 dB), (ii) time-varying interference ($\sim 2$ dB), (iii) thermal drift and alignment loss ($\sim 1$-2 dB).

Typical rule of thumb: field gain $\approx$ chamber gain $- 8$ dB for dense urban, $-5$ dB for suburban, $-3$ dB for open-field scenarios. Publish both numbers.

$\Delta T = 15°$C gives $15°$ per-element phase drift. Across 128 elements with identical thermal profile, the drift is common-mode and cancels in coherent combining — but the bias points differ, so residual RMS error is $\sigma_\phi \approx 15°/\sqrt{N_{\text{groups}}} \approx 7-10°$.

To keep $\sigma_\phi \leq 10°$, re-calibrate when $\Delta T$ exceeds $10°$C — typically every 2-4 h indoor, every 30 min outdoor with sun exposure.

Cost $= 1024 \cdot \$1 = \$1024$. $\eta / \text{cost} = 0.35 / 1024 = 3.4 \times 10^{-4}$ per $.

Cost $= 1024 \cdot \$8 = \$8192$. $\eta / \text{cost} = 0.65 / 8192 = 7.9 \times 10^{-5}$ per $.

Panel A delivers $4.3\times$ more efficiency per dollar. At commercial scale, this drives the choice toward 2-bit PIN-diode RIS, at the cost of $\sim 3$ dB performance.

$|\Gamma| \approx |S_{21}| / |S_{21}^{\text{ref}}|$. With a reference through-path removed, $|\Gamma| = 0.8$.

$\arg(\Gamma) = 1.2$ rad $= 68.8°$.

$L = -20 \log_{10}(0.8) = 1.94$ dB — at the upper edge of acceptable PIN-diode loss.

$\eta_{\text{pol}} = \cos^2(30°) = 0.75$ ($-1.25$ dB).

(i) Use a dual-polarization RIS (separate H/V elements), (ii) rotate the panel physically to match, or (iii) use circular polarization at the BS and RIS (CP-CP match is $-3$ dB each way, total $-6$ dB — worse than linear-linear, only useful for rotating UEs).

In each 10 ms window, the RIS is reconfigured 10 times. Each configuration is "fresh" for approximately $T_c / (N_{\text{reconfigs}}) = 1$ ms $-$ matches controller. $\eta_{\text{time}} \approx 1$ (no loss from insufficient refresh).

If refresh rate drops to 10 Hz (100 ms), RIS is stale for 90 ms of each coherence block → $\eta_{\text{time}} \approx 0.1$ ($-10$ dB). The refresh rate must exceed $1 / T_c$.

(i) Sub-0.1 mm PCB routing tolerances required — conventional FR4 hits its limit, need LTCC or silicon. (ii) Per-element insertion loss scales with $1/\text{area}$ and typically doubles from 28 GHz to 100 GHz. (iii) Bias-line density: $N^2/$panel-area grows as $\wl^{-2}$ — 10× more control lines per unit area.

GaAs varactors replace silicon PIN diodes above 60 GHz (bandwidth). Continuous-analog control becomes standard for sub-THz; digital is too slow.

$\Delta\theta_{3dB} \approx 0.88 \wl / L = 1.76 / N$ rad $\approx 101°/N$.

$N = 16$: $6.3°$. $N = 64$: $1.6°$. $N = 256$: $0.39°$. $N = 1024$: $0.099°$.

Larger $N$ is more selective — good for targeting, but unforgiving to misalignment. Calibration tolerance must scale inversely with $N$.

$T = 0.01 \cdot 1024 = 10.24$ h. Cost = \$512.$\sigma_\phi = 0.1/0.01 = 10°$. Gain efficiency$\eta_{\text{cal}} = e^{-(10° \cdot \pi/180)^2} \approx 0.97$.

$T = 0.02 \cdot 1024 = 20.5$ h. Cost = \$1024.$\sigma_\phi = 0.1/0.02 = 5°$.$\eta_{\text{cal}} = 0.99$. Gain:$+0.09$dB for$+$$512.

ROI of doubling cal time: $0.09$ dB for \$512. Usually not worth it unless in the$N > 4096$ regime.

A RIS contains a passive mirror if all elements are tuned to specular reflection. Reporting gain over metal plate isolates the programmability gain from the plate's aperture gain. Reporting gain over no-RIS muddles the two: the plate alone gives $+N$ dB of aperture gain; the programmability adds $+N^2/N = +N$ more.

Metal-plate measurement uses the same geometry as RIS-on, so geometry errors cancel in the ratio. No-RIS measurement requires removing the panel entirely, introducing alignment errors.

20 dB field $+$ 8 dB urban derating $= 28$ dB chamber gain relative to direct path.

Assuming 10 dB of path-loss difference (BS-RIS-UE vs. direct): $G_{\text{aperture}} \geq 28 + 10 = 38$ dB. $N^2 \cdot \eta_{\text{total}} \geq 10^{3.8}$.

Assume $\eta_{\text{total}} = 0.35$ (typical 2-bit PIN): $N^2 \geq 10^{3.8}/0.35 = 18000 \Rightarrow N \geq 135$.

Round to $N = 144$ (12×12), 2-bit phase, $\sigma_\phi \leq 15°$ (achieved with LUT). Total BOM $\sim \$150$ per panel. $\blacksquare$